The present invention relates to technology for realizing a stable rewrite operation of a nonvolatile memory device, and to technology which is effective when applied to a flash memory, for example.
In performing a step-up for word line driver voltage in a PSRAM of wide power specifications, Patent Document 1 discloses technology for eliminating waste of consumption current due to instability of a current value near the mode switching point of the step-up operation, and attaining low power consumption. According to the technology, the PSRAM operates in a normal operation mode in which power supply voltage VCCH is supplied and in a data retention mode in which power supply voltage VCCL is supplied, and a double voltage generation circuit of a voltage supplying circuit is designed to switch a step-up mode at the time of generating step-up voltage VCH, correspondingly to whether the power supply voltage VCC is equal to or higher than a predetermined value VCCM.
Patent Document 2 discloses a charge pump which is adjustable in response to external power supply voltage. The number of stages employed at the time of operation of the charge pump changes corresponding to an operating state of an integrated circuit. The number of stages employed assures generation of a suitable voltage output, irrespective of changes of the operating state such as a variation of a power supply voltage level for example. The power supply voltage level is detected using a power supply level detection circuit. A logic circuit receives information from a voltage level detection circuit included in the power supply level detection circuit, and adjusts the charge pump so that only a specific number of stages may be employed.
Patent Document 3 discloses a circuit system in which an external power supply voltage is clamped to a voltage lower than it and the clamped voltage is used as a reference supply of a charge pump. Accordingly, it becomes possible to operate the circuit even when a range of the external power supply voltage is wide.    (Patent Document 1) Japanese Patent Laid-open No. Hei 5 (1993)-189961    (Patent Document 2) Japanese Patent Laid-open No. 2002-519808 (Japanese Translation of International Publication No. WO2000/00983)    (Patent Document 3) Japanese Patent Laid-open No. Hei 10 (1998)-214496